5th International Workshop on Verification and Evaluation of
VECoS 2011 Program
Thursday September 15th
8:30 Opening session
9:00 Invited talk by Erol Gelenbe
Power Aware ICT and Network Management”
10:00 Coffee break
10:30 Stochastic modelling and analysis
Proposition and evaluation of a novel routing protocol for wireless sensor networks
Samira Yessad, Louiza Bouallouche and Djamil Aissani
A tool to model traffic aggregation in networks of reconfigurable optical add/drop
multiplexers
Jean-Michel Fourneau and Nora Izri
Mx/G/1 retrial queue with impatient batches under low and high intensities of retrials
Nawel Arrar Remita, Natalia Djellab and Jean-Bernard Baillon
Strong and weak orderings for an accurate resource dimensioning
Hind Castel-Taleb and Nihal Pekergin
12:30 Lunch
14:30 Invited talk by Jean Jacques Lesage
Tailor-made vs. formal languages: how to reconcile effectiveness and rigour of modeling for
automation engineering? “
15:30 Coffee break
16:00 Control synthesis and optimization
Modeling complex systems with VeriJ
Yan Zhang, Béatrice Bérard, Lom Messan Hillah, Fabrice Kordon and Yann Thierry-Mieg
Scheduling and Control Modeling of HVLV Systems Using Max-Plus Algebra
Imed Nasri, Reda Boukezzoula and Georges Habchi
A Mathematical Model for Cyclic Scheduling With Limited Work-In-Process and Cycle Time
Minimization
Mohamed Amin Ben Amar, Hervé Camus and Ouajdi Korbaa
An Iterative Approach for the Satisfaction of Security Using the Intransitive Non-Interference
Property
Achraf Ben Said, Nejib Ben Hadj-Alouane, Moez Yeddes and Feng Lin
20:00 Workshop dinner
Friday, September 16th
9:00 Invited talk by Daniel Kroening
Proving Program Termination
10:00 Coffee break
10:30 Verification
LTL Translation Improvements in Spot
Alexandre Duret-Lutz
Invariant Relations: An Automated Tool to Analyze Loops
Asma Louhichi, Olfa Mraihi, Wided Ghardallou, Lamia Labed, Khaled Bsaies and Ali Mili
Formal Modelling and Verification of JXTA peer-to-peer network protocols
Yannick Kala Konga, Karim Djouani and Guillaume Noel
Building Systemc waiting state automata
Nesrine Harrath, Bruno Monsuez and Joelle Delacroix
12h30 Lunch
14:30 Formal Specification
Using Sequence Diagrams to Specify and to Generate RTL Assertions
Martin Schweikert, Tobias Dornes and Eveking Hans
On Formalizing UML2 Activities Using TPNets: Case Studies
Sabine Boufenara, Kamel Barkaoui, Faiza Belala and Hanifa Boucheneb
Safety Implementation of Adaptive Tunis Science City (Embedded Control Components
Atef Gharbi, Mohamed Khalgui, Antonio Valentini and Samir Ben Ahmed
Toward a rewriting logic framework for safe and distributed component installation
Meriem Belguidoum, Faiza Belala and Fateh Latreche
16:30 Coffee break
17:00 Closing session
Tunis Science City (CST)
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